unsloth/scripts/benchmarks/results/stats
Daniel Han 61c2e5c105 flex: switch to merge_adapter (reversible) + reframe writeup
Prior default was `peft_model.merge_and_unload()` which bakes LoRA into
the base and destroys the adapter. Same inference speed, but the adapter
is unrecoverable so you can't train on it for the next rollout -- which
GRPO explicitly needs.

Switch default to `peft_model.merge_adapter()`, which:
- Folds LoRA into `base_layer.weight` non-destructively.
- Keeps `lora_A` / `lora_B` parameters intact.
- Flips a `merged` flag inside each `LoraLayer` so its forward
  short-circuits to just `base_layer(x)`, giving identical inference speed
  to the destructive merge.
- Is fully reversible via `unmerge_adapter()` (bf16 round-trip error ~6e-5).

Measured end-to-end at batch 64 + LoRA rank 32:
  - merge_adapter: 5785 tok/s best (was 5744 with merge_and_unload)
  - merge+unmerge cycle: ~48 ms total for the 36-layer 7-target adapter,
    which is <1 % of a ~5-7 s rollout -- fully amortizable per iteration.

This is *the* rollout path GRPO should use. vLLM's LoRARequest achieves
the same outcome via double-copy (pristine base + materialized base+LoRA
copy) or Punica-style fused kernels, but from a throughput standpoint
both get you to "near-merged speed with adapter separable for training".

Reframes the writeup: removes the previous panic correction that claimed
flex was 35 % of vLLM. The 35 % row is what you'd get with a naive PEFT
wrapper (3 matmuls per projection) -- a path nobody should actually
use. The real headline is still flex reaches 74 % of vLLM at 3.5 x less
memory under proper LoRA semantics.

`--no_merge_lora` flag preserved for the unmerged-PEFT path; documented as
reference only. 4-bit still uses the unmerged path (bnb merging is
unsupported).
2026-04-21 03:05:28 +00:00
..
cb_sync_smoke.json Phase 2 vibe (10-step): vllm vs unsloth_fi_false vs cb_paged + Phase 3 fixes 2026-04-20 14:23:51 +00:00
cb_tpaged_64_lora_4bit.json flex: support --load_in_4bit with PEFT adapter (bnb-4bit shard) 2026-04-21 02:13:06 +00:00
cb_tpaged_64_lora_4bit_tied.json flex: support --load_in_4bit with PEFT adapter (bnb-4bit shard) 2026-04-21 02:13:06 +00:00
flex_8_tuned.json FlexKernelOptions sweep: flex reaches 72% of vLLM at batch 64 + LoRA 2026-04-20 23:30:05 +00:00
flex_16_tuned.json FlexKernelOptions sweep: flex reaches 72% of vLLM at batch 64 + LoRA 2026-04-20 23:30:05 +00:00
flex_32_tuned.json FlexKernelOptions sweep: flex reaches 72% of vLLM at batch 64 + LoRA 2026-04-20 23:30:05 +00:00
flex_32x512_cudagraph.json Breakthrough: flex_attention + paged KV + CUDA graphs = 35-48% of vLLM 2026-04-20 15:57:41 +00:00
flex_32x512_eager.json Breakthrough: flex_attention + paged KV + CUDA graphs = 35-48% of vLLM 2026-04-20 15:57:41 +00:00
flex_32x512_lora_cudagraph.json Flex+CUDA-graph closes gap to vLLM across batch sizes 2026-04-20 16:09:47 +00:00
flex_32x512_mauto_nocg.json Batch-size sweep: flex@256 vs vLLM@256 + max-autotune check 2026-04-20 16:17:19 +00:00
flex_64_lora_4bit.json flex: support --load_in_4bit with PEFT adapter (bnb-4bit shard) 2026-04-21 02:13:06 +00:00
flex_64_lora_4bit_tied.json flex: support --load_in_4bit with PEFT adapter (bnb-4bit shard) 2026-04-21 02:13:06 +00:00
flex_64_lora_autotune.json flex: test FA4 prefill + Inductor autotune replay (both regress) 2026-04-21 00:25:11 +00:00
flex_64_lora_autotune_tma.json flex: test FA4 prefill + Inductor autotune replay (both regress) 2026-04-21 00:25:11 +00:00
flex_64_lora_bf16_mergeadapter.json flex: switch to merge_adapter (reversible) + reframe writeup 2026-04-21 03:05:28 +00:00
flex_64_lora_bf16_nomerge.json flex: fair comparison -- benchmark LoRA active, not merged 2026-04-21 02:22:48 +00:00
flex_64_lora_fa4prefill.json flex: test FA4 prefill + Inductor autotune replay (both regress) 2026-04-21 00:25:11 +00:00
flex_64_lora_pinned_blocks.json flex: test FA4 prefill + Inductor autotune replay (both regress) 2026-04-21 00:25:11 +00:00
flex_64_lora_torch211_10rounds.json flex: test FA4 prefill + Inductor autotune replay (both regress) 2026-04-21 00:25:11 +00:00
flex_64_lora_torch211_baseline.json flex: test FA4 prefill + Inductor autotune replay (both regress) 2026-04-21 00:25:11 +00:00
flex_64_lora_torch211_repeat.json flex: test FA4 prefill + Inductor autotune replay (both regress) 2026-04-21 00:25:11 +00:00
flex_64_lora_tuned.json FlexKernelOptions sweep: flex reaches 72% of vLLM at batch 64 + LoRA 2026-04-20 23:30:05 +00:00
flex_64_tuned.json FlexKernelOptions sweep: flex reaches 72% of vLLM at batch 64 + LoRA 2026-04-20 23:30:05 +00:00
flex_64x512_lora_cudagraph.json Flex+CUDA-graph closes gap to vLLM across batch sizes 2026-04-20 16:09:47 +00:00
flex_128_tuned.json FlexKernelOptions sweep: flex reaches 72% of vLLM at batch 64 + LoRA 2026-04-20 23:30:05 +00:00
flex_128x512_cudagraph.json Flex+CUDA-graph closes gap to vLLM across batch sizes 2026-04-20 16:09:47 +00:00
flex_256x512.json Batch-size sweep: flex@256 vs vLLM@256 + max-autotune check 2026-04-20 16:17:19 +00:00
grpo_cb_paged_10.json Phase 2 vibe (10-step): vllm vs unsloth_fi_false vs cb_paged + Phase 3 fixes 2026-04-20 14:23:51 +00:00
grpo_cb_paged_10.summary.json Phase 2 vibe (10-step): vllm vs unsloth_fi_false vs cb_paged + Phase 3 fixes 2026-04-20 14:23:51 +00:00
grpo_cb_paged_30.json Phase 2: 30-step equivalence + pairwise diffs vs vLLM 2026-04-20 15:03:32 +00:00
grpo_cb_paged_30.summary.json Phase 2: 30-step equivalence + pairwise diffs vs vLLM 2026-04-20 15:03:32 +00:00
grpo_fi_false_30.json Phase 2: 30-step equivalence + pairwise diffs vs vLLM 2026-04-20 15:03:32 +00:00
grpo_fi_false_30.summary.json Phase 2: 30-step equivalence + pairwise diffs vs vLLM 2026-04-20 15:03:32 +00:00
grpo_unsloth_fi_false_10.json Phase 2 vibe (10-step): vllm vs unsloth_fi_false vs cb_paged + Phase 3 fixes 2026-04-20 14:23:51 +00:00
grpo_unsloth_fi_false_10.summary.json Phase 2 vibe (10-step): vllm vs unsloth_fi_false vs cb_paged + Phase 3 fixes 2026-04-20 14:23:51 +00:00
grpo_vllm_10.json Phase 2 vibe (10-step): vllm vs unsloth_fi_false vs cb_paged + Phase 3 fixes 2026-04-20 14:23:51 +00:00
grpo_vllm_10.summary.json Phase 2 vibe (10-step): vllm vs unsloth_fi_false vs cb_paged + Phase 3 fixes 2026-04-20 14:23:51 +00:00
grpo_vllm_30.json Phase 2: 30-step equivalence + pairwise diffs vs vLLM 2026-04-20 15:03:32 +00:00
grpo_vllm_30.summary.json Phase 2: 30-step equivalence + pairwise diffs vs vLLM 2026-04-20 15:03:32 +00:00
lora_cb_paged_fa4_gen.json Phase 1+3: LoRA rollout benchmarks + CB sync driver + Phase 4 scaffold 2026-04-20 14:01:16 +00:00
lora_cb_sdpa_paged_gen.json Phase 1+3: LoRA rollout benchmarks + CB sync driver + Phase 4 scaffold 2026-04-20 14:01:16 +00:00
lora_unsloth_fi_false_gen.json Phase 1+3: LoRA rollout benchmarks + CB sync driver + Phase 4 scaffold 2026-04-20 14:01:16 +00:00
lora_vllm_gen.json Phase 1+3: LoRA rollout benchmarks + CB sync driver + Phase 4 scaffold 2026-04-20 14:01:16 +00:00
notebook_ref_10.json Add Phase 0+1 GRPO backend comparison scaffolding 2026-04-20 13:54:06 +00:00
unsloth_fi_true_64_lora_4bit.json flex: support --load_in_4bit with PEFT adapter (bnb-4bit shard) 2026-04-21 02:13:06 +00:00
vllm_8.json FlexKernelOptions sweep: flex reaches 72% of vLLM at batch 64 + LoRA 2026-04-20 23:30:05 +00:00
vllm_16.json FlexKernelOptions sweep: flex reaches 72% of vLLM at batch 64 + LoRA 2026-04-20 23:30:05 +00:00
vllm_32.json FlexKernelOptions sweep: flex reaches 72% of vLLM at batch 64 + LoRA 2026-04-20 23:30:05 +00:00
vllm_64.json FlexKernelOptions sweep: flex reaches 72% of vLLM at batch 64 + LoRA 2026-04-20 23:30:05 +00:00
vllm_64x512_lora.json Flex+CUDA-graph closes gap to vLLM across batch sizes 2026-04-20 16:09:47 +00:00
vllm_128x512.json Flex+CUDA-graph closes gap to vLLM across batch sizes 2026-04-20 16:09:47 +00:00
vllm_256x512.json Batch-size sweep: flex@256 vs vLLM@256 + max-autotune check 2026-04-20 16:17:19 +00:00