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Author	SHA1	Message	Date
danielhanchen	690185abe1	Use device-aware bf16 check so AMD/Intel are unaffected The auto mixed-precision branch now gates bf16 on unsloth_zoo's device_is_bf16_supported() (CUDA/XPU/HIP) instead of torch.cuda.is_bf16_supported(), which is only patched on CUDA. This keeps V100/T4 on fp16 while leaving AMD (HIP) and Intel (XPU) behavior unchanged. Falls back to the torch call on older unsloth_zoo.	2026-05-31 04:31:30 +00:00
pre-commit-ci[bot]	cca441f125	[pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci	2026-05-31 03:43:26 +00:00
danielhanchen	84f76a42cb	Add regression tests for V100 full finetuning precision Exercise the real SFTTrainer mixed-precision template from rl.py source against mocked inputs: normal models get float32 weights + fp16 forward, FORCE_FLOAT32 models stay pure float32, no bf16 on no-bf16 hardware, and bf16 GPUs are unchanged. Covers issue #4082.	2026-05-31 03:43:12 +00:00

Author

SHA1

Message

Date

danielhanchen

690185abe1

Use device-aware bf16 check so AMD/Intel are unaffected

The auto mixed-precision branch now gates bf16 on unsloth_zoo's
device_is_bf16_supported() (CUDA/XPU/HIP) instead of torch.cuda.is_bf16_supported(),
which is only patched on CUDA. This keeps V100/T4 on fp16 while leaving AMD (HIP)
and Intel (XPU) behavior unchanged. Falls back to the torch call on older
unsloth_zoo.

2026-05-31 04:31:30 +00:00

pre-commit-ci[bot]

cca441f125

[pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

2026-05-31 03:43:26 +00:00

danielhanchen

84f76a42cb

Add regression tests for V100 full finetuning precision

Exercise the real SFTTrainer mixed-precision template from rl.py source against
mocked inputs: normal models get float32 weights + fp16 forward, FORCE_FLOAT32
models stay pure float32, no bf16 on no-bf16 hardware, and bf16 GPUs are
unchanged. Covers issue #4082.

2026-05-31 03:43:12 +00:00

3 commits