perf(video): accuracy-first round 2 for HunyuanVideo-1.5: compile parity, cache quality presets, dual-GPU CFG

Cuts the shipped default's LPIPS vs the bit-exact reference from 0.224 to 0.139
while going faster (24.9 s to 21.2 s at 720p/33f/30 steps, 22.7x vs reference),
and makes the remaining speed/accuracy trade a user knob.

- inductor precision parity: set emulate_precision_casts=True for the regional
  compile (fused pointwise kernels kept fp32 intermediates where eager rounds to
  bf16 between ops); full-clip LPIPS vs bit-exact 0.221 to 0.052 at zero speed
  cost. Snapshot/restored with the other process-wide backend flags.
- cache x compile composition fix: diffusers cache hooks are
  torch.compiler.disable'd, so every COMPUTED step ran eager (1.69 vs 1.09
  s/step) under MagCache/FBCache in both enable orders. Re-point each hook's
  fn_ref.original_forward at a torch.compile'd wrapper of the same bound method
  (armed only where the speed layer compiled the block; restored before every
  disable_cache so the uncached path stays pristine). Balanced MagCache at 50
  steps: 1.48x to 2.17x, identical skip counts, bit-identical uncached rerun
  after enable/disable cycles.
- transformer_cache_quality knob (quality|balanced|fast; API + UI + bench)
  mapping to (threshold, max_skip_steps, retention_ratio). Auto resolves to the
  near-lossless quality preset (0.06, 2, 0.3; 1.63-1.64x at pairwise LPIPS
  0.05-0.09) for the HunyuanVideo-1.5 families and to balanced (the pre-knob
  values, byte-identical behaviour) everywhere else.
- TE auto-quant resolves dense for HunyuanVideo-1.5: TE fp8_dynamic alone moves
  the clip to LPIPS 0.236 vs bit-exact for zero speed win (the quantised encoder
  perturbs the conditioning and the trajectory amplifies it chaotically); VAE
  fp8 stays in auto (0.053, at the compile floor). Explicit schemes honored.
- dual-GPU CFG branch parallelism (new diffusion_cfg_parallel.py): transformer
  proxy + DiT replica on the most-free second CUDA device + worker thread,
  branch-routed off the pipeline's own cache_context names. Auto engages only
  where measured bit-identical (eager tier: max abs diff 0.0, 1.66x); the
  compiled stack is explicit cfg_parallel=on (1.52x over the sequential
  default; per-device compiled artifacts differ by 1 bf16 ulp/step, documented
  in the resolved record). Fail-soft gates: family allowlist, guider CFG,
  pipeline kind, dense DiT, no offload, free-VRAM check; single-GPU loads are
  untouched and the memory plan stays single-device.
- video API: the transformer_cache literal now accepts auto/magcache (an
  explicit magcache request was rejected at the pydantic layer); the mxfp8
  family deny records the round-2 measurement (block-32 MX scaling fixes the
  zero-row collapse, no black frames, but is latency-neutral at LPIPS 0.37:
  fails both ship bars).

Measured on B200 via the production lever path (video_speedmem_bench.py, which
gained a --cache-quality lever and companion-quant isolation configs). Tests:
441 passing across the video inference suite (32 new for cfg-parallel, 20 for
presets/arming, 3 for the inductor flag, 2 for TE auto-dense); ruff clean.

studio/backend/core/inference/diffusion_speed.py

@@ -77,6 +77,9 @@ def snapshot_backend_flags() -> Optional[dict]:
             state["cudnn_tf32"] = bool(cudnn.allow_tf32)
         if hasattr(cudnn, "benchmark"):
             state["cudnn_benchmark"] = bool(cudnn.benchmark)
+    inductor_cfg = _inductor_config()
+    if inductor_cfg is not None and hasattr(inductor_cfg, "emulate_precision_casts"):
+        state["inductor_emulate_precision_casts"] = bool(inductor_cfg.emulate_precision_casts)
     return state
 
 
@@ -103,6 +106,20 @@ def restore_backend_flags(state: Optional[dict]) -> None:
     cudnn = getattr(torch.backends, "cudnn", None)
     _set(cudnn, "allow_tf32", "cudnn_tf32")
     _set(cudnn, "benchmark", "cudnn_benchmark")
+    _set(_inductor_config(), "emulate_precision_casts", "inductor_emulate_precision_casts")
+
+
+def _inductor_config() -> Any:
+    """``torch._inductor.config`` or None. Resolved as attributes off the imported torch
+    module (real torch exposes ``_inductor`` directly after ``import torch``) rather
+    than a submodule import, so a stubbed/partial torch (tests, exotic builds) cleanly
+    reports None instead of picking a stale real module out of ``sys.modules``."""
+    try:
+        import torch
+
+        return getattr(getattr(torch, "_inductor", None), "config", None)
+    except Exception:  # noqa: BLE001 — no inductor -> nothing to snapshot/set
+        return None
 
 
 def normalize_speed_mode(value: Optional[str]) -> str:
@@ -342,6 +359,16 @@ def _compile_repeated_blocks(
             for _limit_attr in ("recompile_limit", "cache_size_limit"):  # name varies by torch ver
                 if hasattr(dynamo_cfg, _limit_attr):
                     setattr(dynamo_cfg, _limit_attr, max(getattr(dynamo_cfg, _limit_attr) or 0, 64))
+        # Match eager's intermediate rounding inside inductor's fused pointwise kernels:
+        # by default they keep chains in fp32 where eager materialises bf16 between ops,
+        # a per-forward rounding delta (max abs ~0.09 on the HunyuanVideo-1.5 DiT) that a
+        # multi-step denoise amplifies chaotically -- measured full-clip LPIPS vs the
+        # bit-exact reference drops 0.221 -> 0.052 at ZERO speed cost (1.093 vs 1.089
+        # s/step on a B200, 720p/33f). Process-global, so snapshot_backend_flags carries
+        # it and unload restores the prior value.
+        inductor_cfg = _inductor_config()
+        if inductor_cfg is not None and hasattr(inductor_cfg, "emulate_precision_casts"):
+            inductor_cfg.emulate_precision_casts = True
     except Exception as exc:  # noqa: BLE001 — optimisation only
         _warn(logger, "compile_repeated_blocks", exc)
         return False
@@ -354,6 +381,21 @@ def _compile_repeated_blocks(
             engaged = True
         except Exception as exc:  # noqa: BLE001 — optimisation only
             _warn(logger, "compile_repeated_blocks", exc)
+            continue
+        # A step cache engaged BEFORE this compile (the production load order) has
+        # already wrapped each block's forward in a @torch.compiler.disable'd hook, so
+        # the compute branch would run eager on every non-skipped step and forfeit the
+        # regional compile entirely (measured 1.69 vs 1.09 s/step on HunyuanVideo-1.5).
+        # Re-point the hooks' inner forward at compiled wrappers; no-op when no cache
+        # hooks are installed. The toggle path (cache engaged after load) is armed by
+        # apply_step_cache instead. Lazy import: diffusion_cache imports nothing from
+        # this module, but keep the dependency one-directional at import time.
+        try:
+            from .diffusion_cache import _compile_hooked_block_inners
+
+            _compile_hooked_block_inners(transformer, logger)
+        except Exception as exc:  # noqa: BLE001 — optimisation only
+            _warn(logger, "cache-hook inner compile", exc)
     return engaged