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Merge branch 'main' into nightly

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This commit is contained in:
Daniel Han 2025-12-19 19:31:23 -08:00
commit 610108fa87
4 changed files with 70 additions and 18 deletions
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52
unsloth/device_type.py
View file

@ -25,7 +25,6 @@ __all__ = [
import torch
import functools
from unsloth_zoo.utils import Version
import inspect
@functools.cache
@ -78,21 +77,50 @@ def get_device_count():
DEVICE_COUNT: int = get_device_count()
# Check blocksize for 4bit -> 64 for CUDA, 128 for AMD
# If AMD, we cannot load pre-quantized models for now :(
# 4-bit quantization requires a block size of 64
# this is not supported on AMD Instinct GPUs currently
# | Device Type | Warp Size | Block Size |
# |-----------------|-----------|------------|
# | CUDA | 32 | 64 |
# | Radeon (Navi) | 32 | 64 |
# | Instinct (MI) | 64 | 128 |
#
# Since bitsandbytes 0.49.0, pre-quantized models with 64 blockwise now works
# on Radeon GPUs, but not Instinct MI300x for eg [WIP]
# See https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1748
ALLOW_PREQUANTIZED_MODELS: bool = True
# HSA_STATUS_ERROR_EXCEPTION checks - sometimes AMD fails for BnB
ALLOW_BITSANDBYTES: bool = True
if DEVICE_TYPE == "hip":
try:
from bitsandbytes.nn.modules import Params4bit
if "blocksize = 64 if not HIP_ENVIRONMENT else 128" in inspect.getsource(
Params4bit
):
ALLOW_PREQUANTIZED_MODELS = False
import bitsandbytes
ALLOW_BITSANDBYTES = Version(bitsandbytes.__version__) > Version("0.48.2.dev0")
except:
pass
print(
"Unsloth: `bitsandbytes` is not installed - 4bit QLoRA unallowed, but 16bit and full finetuning works."
)
ALLOW_PREQUANTIZED_MODELS = False
ALLOW_BITSANDBYTES = False
if ALLOW_BITSANDBYTES:
ALLOW_BITSANDBYTES = Version(bitsandbytes.__version__) > Version("0.48.2.dev0")
if Version(bitsandbytes.__version__) > Version("0.49.0"):
try:
# Pre-quantized bitsandbytes models use blocksize 64, so we need to check the GPU
from bitsandbytes.cextension import ROCM_WARP_SIZE_64
ALLOW_PREQUANTIZED_MODELS = not ROCM_WARP_SIZE_64
except Exception as e:
print(
"Unsloth: Checking `from bitsandbytes.cextension import ROCM_WARP_SIZE_64` had error = \n"
f"{str(e)}\n"
"4bit QLoRA disabled for now, but 16bit and full finetuning works."
)
ALLOW_PREQUANTIZED_MODELS = False
ALLOW_BITSANDBYTES = False
elif ALLOW_BITSANDBYTES:
from bitsandbytes.nn.modules import Params4bit
if "blocksize = 64 if not HIP_ENVIRONMENT else 128" in inspect.getsource(
Params4bit
):
ALLOW_PREQUANTIZED_MODELS = False

2
unsloth/models/_utils.py
View file

@ -12,7 +12,7 @@
# See the License for the specific language governing permissions and
# limitations under the License.
__version__ = "2025.12.7"
__version__ = "2025.12.8"
__all__ = [
"SUPPORTS_BFLOAT16",

8
unsloth/models/loader.py
View file

@ -240,7 +240,7 @@ class FastLanguageModel(FastLlamaModel):
model_name = new_model_name
# Check if pre-quantized models are allowed
# For eg AMD GPUs need blocksize = 128, but our pre-quants are blocksize = 64
# For eg AMD Instinct GPUs need blocksize = 128, but our pre-quants are blocksize = 64
if not ALLOW_PREQUANTIZED_MODELS and model_name.lower().endswith(
("-unsloth-bnb-4bit", "-bnb-4bit")
):
@ -374,7 +374,7 @@ class FastLanguageModel(FastLlamaModel):
if not use_exact_model_name:
model_name = get_model_name(model_name, load_in_4bit)
# Check if pre-quantized models are allowed
# For eg AMD GPUs need blocksize = 128, but our pre-quants are blocksize = 64
# For eg AMD Instinct GPUs need blocksize = 128, but our pre-quants are blocksize = 64
if not ALLOW_PREQUANTIZED_MODELS and model_name.lower().endswith(
("-unsloth-bnb-4bit", "-bnb-4bit")
):
@ -773,7 +773,7 @@ class FastModel(FastBaseModel):
model_name = new_model_name
# Check if pre-quantized models are allowed
# For eg AMD GPUs need blocksize = 128, but our pre-quants are blocksize = 64
# For eg AMD Instinct GPUs need blocksize = 128, but our pre-quants are blocksize = 64
if not ALLOW_PREQUANTIZED_MODELS and model_name.lower().endswith(
("-unsloth-bnb-4bit", "-bnb-4bit")
):
@ -1039,7 +1039,7 @@ class FastModel(FastBaseModel):
if not use_exact_model_name:
model_name = get_model_name(model_name, load_in_4bit)
# Check if pre-quantized models are allowed
# For eg AMD GPUs need blocksize = 128, but our pre-quants are blocksize = 64
# For eg AMD Instinct GPUs need blocksize = 128, but our pre-quants are blocksize = 64
if not ALLOW_PREQUANTIZED_MODELS and model_name.lower().endswith(
("-unsloth-bnb-4bit", "-bnb-4bit")
):

26
unsloth/models/vision.py
View file

@ -32,6 +32,13 @@ from ..kernels import (
from ._utils import __version__, importlib_version, _prepare_model_for_qat
from ._utils import *
from ..save import patch_saving_functions
from ..models.loader_utils import is_distributed
from unsloth_zoo.gradient_checkpointing import (
unpatch_unsloth_gradient_checkpointing,
unpatch_unsloth_smart_gradient_checkpointing,
)
import torch.utils.checkpoint as torch_checkpoint
import transformers.modeling_utils as hf_modeling_utils
from peft import LoraConfig, TaskType, get_peft_model as _get_peft_model
from peft import PeftModelForCausalLM
from transformers import set_seed as transformers_set_seed
@ -1085,10 +1092,27 @@ class FastBaseModel:
# Use bfloat16 precision for full finetuning
float32_mixed_precision = False
# VLMs can hit DDP "marked ready twice" with re-entrant checkpointing.
# See: https://github.com/unslothai/unsloth/issues/3713.
use_reentrant = not is_distributed()
if not use_reentrant:
# Under DDP, avoid the offloaded/re-entrant checkpoint patch.
unpatch_unsloth_gradient_checkpointing()
unpatch_unsloth_smart_gradient_checkpointing()
# Force native checkpoint to default to non-reentrant for downstream calls.
_orig_checkpoint = torch_checkpoint.checkpoint
def _nonre_checkpoint(function, *args, **kwargs):
kwargs["use_reentrant"] = False
return _orig_checkpoint(function, *args, **kwargs)
torch_checkpoint.checkpoint = _nonre_checkpoint
hf_modeling_utils.checkpoint = _nonre_checkpoint
model = prepare_model_for_training(
model,
use_gradient_checkpointing = use_gradient_checkpointing,
use_reentrant = True,
use_reentrant = use_reentrant,
full_finetuning = full_finetuning,
train_layernorms = full_finetuning,
train_embedding = full_finetuning,